This invention concerns a program switching or thread interrupt processing method in an operation processing device and the device using such interrupt processing method, which causes a specific program being executed to be temporarily halted in response to an interrupt so that another program can be executed. More specifically, the invention concerns interrupt processing in an operation processing device which can create a memory work area dynamically depending on the program content being currently processed.
Recent operation processing devices which execute multithread processes set up a separate work area or memory location (hereafter, these areas are referred to as xe2x80x9cthread work areasxe2x80x9d) for each thread. When a thread being executed needs to access programs, it accumulates work areas, which are called xe2x80x9cframes,xe2x80x9d in the thread work area. It executes these programs in order, starting with the one most recently accessed.
When this type of operation processing device receives an interrupt signal, it has to interrupt the program being executed in order to run some other program. To do this it must set up an area (hereafter referred to as the xe2x80x9cstorage area for sidetracked dataxe2x80x9d) to sidetrack the register state and progress of the program being executed at the moment the interrupt was generated. Since a number of interrupts may be generated in series, a stack data container or area is designated where the sidetracked data for each interrupt can be stored in the order received.
FIG. 6 shows a prior art configuration for this sort of operation processing device.
In the figure, program executing unit 31 to execute the program, interrupt control unit 32 to control interrupts and side track and restore data unit 33 to sidetrack and restore data are all realized by the functions of a processor (i.e., a CPU), which is not pictured. Thread work area 34, interrupt program work area 35 and sidetrack data storage area 36 for sidetracked data are all set up in a RAM. Interrupt vector storage area 37 for interrupt vectors and storage area 38 for values to generate interrupts (hereafter referred to simply as xe2x80x9cinterrupt value storage area 38xe2x80x9d) are set up in either a ROM or a RAM.
Program executing unit 31 has an internal register 30, in which are stored the data it needs to run a program. As it executes a program, it reads and writes data to and from internal register 30 and the thread work area 34 for the thread it is executing. The aforesaid internal register 30 contains a program counter, which is the register to store addresses needed to run the program; a thread address register, which stores the address of the thread work area 34 for the thread being used; a status register, which stores data indicating the internal status of the processor; and a universal register, which stores the results of the operations.
Interrupt control unit 32 receives an interrupt signal and determines whether the interrupt program requesting processing demanded by that signal should be given priority over the currently running program. If it determines that the interrupt program should be given priority, it activates sidetrack and restore data unit 33.
Sidetrack and restore data unit 33 temporarily sidetracks the values in internal register 30 (hereafter, the xe2x80x9cregister dataxe2x80x9d) at the moment the interrupt was generated. When the interrupt program""s processing is completed, it returns the aforesaid sidetracked register data to internal register 30 and restores the operating status or register state of the halted program. Sidetrack and restore data unit 33 has inside it a stack pointer to indicate which data is at the head of the stack.
FIG. 7 shows the configuration of the data in the memory of the operation processing device in the aforesaid FIG. 6 which is a prior art.
A thread work area 34 is set up for each thread that is activated (in the example, there are M number of work areas). A thread work area 34 is set up for each program started up to access a function and the likes, in the order in which they are accessed. As their programs are completed, these program work areas disappear, and in their locations, new work areas are set up as new programs are accessed.
The number of areas which are set up in sidetrack data storage area 36 (in the example, N number of areas) should be equal to the number of interrupts anticipated. A number of work areas (in the example, L number of work areas) are set up in interrupt program work area 35 for interrupt programs, which is divided into segments according to the number of interrupt programs. If the same interrupt is to be generated numerous times, the work area for each interrupt program must be large enough to accommodate the processing executed by that program being repeated that same number of times.
A number of pointers (called xe2x80x9cprogram pointersxe2x80x9d), separately created for each of the interrupt programs indicated by the type of interrupt signal, are stored in interrupt vectors storage area 37 for interrupt vectors. The initial values for internal register 30, which are needed to run the programs corresponding to the pointers, and the head address for the work area assigned to each program are stored in interrupt value storage area 38.
FIG. 8 shows the order of processing executed when an interrupt is generated. FIG. 9 shows the order of processing executed when the interrupt program has completed executing. For the sake of convenience, each step in the charts has been given a number.
We shall next explain, with reference to the flow charts, the processing executed in an operation processing device configured as shown in FIG. 6 when an interrupt is generated and when the interrupt program""s processing has been completed.
When an interrupt signal is received while program executing unit 31 is in the process of executing a given program, interrupt control unit 32 checks the priority of the interrupt program associated with that signal (Step 1). If unit 32 determines that the interrupt program awaiting processing has a lower priority than the program being executed, we go to Step 10, and unit 32 executes masking processing to cause the interrupt program to wait until the current program has been completed.
If program executing unit 32 determines that the interrupt program requesting processing has a higher priority than the current program, it reads the program pointer corresponding to the aforesaid interrupt signal out of the aforesaid interrupt vector storage area 37 and sends it to sidetrack and restore data unit 33 (Step 2).
When unit 33 receives this pointer, it sends a request to interrupt the currently executing main program to the aforesaid program executing unit 31 (Step 3). Unit 31 interrupts the said executing program in response to this interrupt request, reads the current register data out of internal register 30 and sends them to sidetrack and restore data unit 33.
When unit 33 receives the register data and so is informed that the program has been interrupted, it stores the data it has just received on the stack level in storage area 36 indicated by the value of the aforesaid stack pointer (Steps 4 and 5).
Sidetrack and restore data unit 33 reads the data corresponding to the value of the aforesaid program pointer out of the aforesaid storage area 38 and sends said data to unit 31 to be executed (Step 6). Based on the data it receives, program executing unit 31 initializes internal register 30 and executes processing to switch the thread from the work area currently in use to that designated for the interrupt program (Step 7).
When these steps have been completed, sidetrack and restore data unit 33 increments the aforesaid stack pointer by 1 and sends unit 31 a request to start the interrupt program (Steps 8 and 9).
Program executing unit 31 runs the interrupt program and then sends a notification that said program has finished to sidetrack and restore data unit 33. When it receives this notification, unit 33 subtracts 1 from the stack pointers and reads out the register data from the storage area 36 for the stack level designated after one pointer has been subtracted. Unit 33 sends the said register state data to program executing unit 31 (Steps 11 and 12). Program executing unit 31 sets the said register data it received in internal register 30, thereby restoring it to the register state or status it had before the interrupt was generated (Step 13). When unit 33 outputs a request to resume the program in Step 14, it enables the aforesaid halted program that was interrupted by the interrupt program to resume running.
If a number of interrupts with high priority are generated one after the other, the procedure in Steps 1 through 9 will be executed each time an interrupt is generated. A stack pointer will be added, the register data at the time the interrupt was generated will be sidetracked, and the interrupt program""s processing will be executed. When the interrupt program""s processing is completed, the halted program""s register data, previously sidetracked when the interrupt was generated, will be read out in order and returned to internal register 30. The program status or register state at the time of each interrupt will be restored in reverse order until at last the program status or register state that obtained before the first interrupt was generated is restored and the previous processing is resumed.
With the configuration of the prior art described above, the content stored in the thread work area 34 for the thread being executed is maintained without change, and only the register data in internal register 30 are sidetracked to allow the interrupt program""s processing to be executed. The present invention does away with the separate sidetrack data storage area, separate sidetrack data storage area stack pointer thus it can use the same thread work area for thread placement and thread interrupt control. Consequently, less time is required than in previous designs to sidetrack and restore the data and the processing is speeded up.
However, the configuration of the prior art described above has the following shortcomings.
Numerous separate storage areas for sidetracked data and a work area with enough capacity to handle all the potential interrupt programs must be maintained in case interrupts are generated in series. However, it is relatively rare that all of these areas will be used. In most cases, the memory resource is wasted. Also, the need to change the value of the separate stack pointer and switch to the thread for interrupt program processing when an interrupt is generated complicates the processing.
Like work areas for ordinary threads, work areas for interrupt programs could be set up dynamically each time an interrupt is generated; this would reduce the memory capacity needed. However, this method would not eliminate the need for a work area separate from that for the ordinary program, so it could not make optimal use of the memory resource or avoid complicating the processing.
The present invention is developed in consideration of the shortcomings outlined above. The objective of this invention is to eliminate wasteful use of the memory resource, remove some of the complexity of interrupt processing and speed up the processing.
In operation processing devices based on Java (a registered trademark), the object-oriented language developed by Sun Microsystems, each time a functional program is executed, in response to a command to access that function, a work area for the program which is accessed is set up dynamically within the thread work area for the thread then being executed. To run the functional program which is accessed, the register data, which indicates the register state or status of the program being executed at the time the aforesaid function is accessed, is sidetracked and the return address needed to restore said register state to the work area for the accessed program (i.e., the frame address) is written into the work area for the aforesaid functional program. Under these conditions, the functional or interrupt program is run. When it is completed, the halted program""s register data are retrieved from the aforesaid frame address and returned to the work area of the accessed program. The register data sidetracked in that area are read out and set in the internal register. In this way the processor returns to the program status or register state that existed when the aforesaid function was accessed then resumes running the original halted program.
By applying the aforesaid processing in the case of an interrupt or an external interrupt as well, this invention eliminates the need to maintain a separate memory area for interrupt processing. It simplifies the processing involved in sidetracking and restoring data and switching the program to be executed.
In the interrupt processing method related to the invention disclosed in claim 1 of this application, the work area for a currently executing program is a dynamically created memory area generated when an interrupt occurs. The register data indicating the status or register state of the program being run at that time is sidetracked into the work area for that halted program. Next, the return address (memory address) needed to return to the thread work area for the program being run when the aforesaid interrupt was generated (the halted program""s thread work area) is sidetracked into the interrupt program""s work area. When the interrupt program processing is completed, the return address is read out of the interrupt program""s work area then the address is used to jump or return to the memory location of the halted program""s work area where the halted program""s register state is stored. Next, the halted program""s register state is read out and reloaded back into the registers and the halted program resumes processing. Using the register data sidetracked in same work area, the processor is restored to the status or state the halted program was in at the time the aforesaid interrupt was generated.
The operation processing device related to the invention disclosed in claim 2 of this application has a read-write memory; a means to execute a program, which dynamically creates work areas in specified portions of the aforesaid memory and executes a program; and a control means, which controls the aforesaid means to execute a program when an interrupt is generated, temporarily interrupts the program being run at that time, and executes a program to run the interrupt program processing. To implement the interrupt method in claim 1, the aforesaid control means has a means to process the sidetracking of data, which, when it finds that an interrupt has been generated, sidetracks the register data indicating the status or state of the program being run when the interrupt was generated, storing the register data in the thread work area for that program, sets up a work area for the interrupt program processing in the aforesaid memory area, and sidetracks the address needed to return to the work area for the halted program, storing it in the work area for the interrupt program; and a means to process the restoring of data, which, when the interrupt program processing has been completed, returns from the aforesaid address which had been sidetracked to the work area in use when the aforesaid interrupt was generated, and, based on the register data sidetracked in that work area, restores the saved status or register state of the halted program being run when the interrupt occurred.
The aforesaid memory area is an area in a read-write memory such as a RAM which is designated for the execution of a program. If multithread processing is executed, the term includes the area set up for each thread (i.e., the thread work areas mentioned above).
The term xe2x80x9cexternal interruptxe2x80x9d refers to interrupts generated with respect to the processor at irregular intervals by peripherals such as input-output devices. Both the inventions in claims 1 and 2 of this application require that the xe2x80x9cexternal interruptxe2x80x9d processing have a higher priority than the program being run at the time the interrupt is generated. Only under this condition will processing be properly executed to sidetrack register data so that the program can be interrupted.
The register data indicating the status or register state of the program being run when the interrupt was generated refers to the data maintained in the processor which represent how far the program has gotten and what results it has obtained so far. Register data includes the program counter representing the address where the program is executed and the results of operations obtained by the program up to that point. The return address (memory location) needed to return to the work area for the program being run when the interrupt was generated (the halted program) is the head address of the work area for that program in the aforesaid memory area or the address of a location in that work area where some specific data are stored.
When an interrupt is generated, the register data indicating the status of the program being run at that moment are stored in the thread work area for that program (the halted program). A work area for the interrupt program""s processing is set up in the part of the memory where work areas for programs can be created dynamically. The return address (memory location) needed to return to the work area for the program being run when the interrupt occurred (halted program""s thread work area) is stored in the thread work area for the interrupt program. When the interrupt program""s processing has been completed, the aforesaid sidetracked address is used to return to the work area for the program that was interrupted. When the register data stored in that area are returned to the processor, the program is restored to the status it was in at the moment it was interrupted and it resumes its processing.
According to this method, there is no need to designate a separate part of the memory as a holding area for sidetracked data or a work area for interrupt program""s processing. The work area in use at the time of the interrupt can be maintained dynamically just as an ordinary program would be. Since the memory contains as many work areas as the number of interrupts generated, the memory resource is not wasted. Because work is performed in the part of the memory used to execute ordinary programs, it is also unnecessary to switch from the thread processing area to a special or separate thread interrupt processing area in order to do the interrupt program processing.
In an operation processing device based on a program written in Java, the processing to sidetrack and restore an interrupted program can be executed by the same method used to access an ordinary program or return to the program that requested the access.